Field of the Invention
The present invention relates to a signal generation device and a method for controlling an output voltage of a regulator.
Background Art
A high speed communication as having a data transfer rate in a high frequency (e.g., GHz) band has recently been performed. A transmitter or the like which realizes such a high speed communication needs to suppress jitter in order to avoid deterioration in communication quality.
The jitter may typically occur due to a fluctuation in output voltage of a regulator used in a signal generation device which outputs a signal to the transmitter or the like. Therefore, the signal generation device needs to suppress the fluctuation in the output voltage of the regulator to be used.
As a technique for suppressing a fluctuation in voltage, for example, Patent Document 1 (Japanese Patent Application Publication No. 2014-513908) discloses a configuration that a compensation type current cell is provided for a current source. Such a compensation type current cell is equipped with first and second switching transistors respectively configured to switch an input current between first and second outputs, based on first and second input signals, a first compensation type transistor connected to the first input signal to provide a first compensation type current connected to the second output, and a second compensation type transistor connected to the second input signal to provide a second compensation type current connected to the first output. The first and second compensation type transistors respectively have source terminals connected to each other.
Further, for example, Patent Document 2 (Japanese Patent Application Publication No. H11(1999)-355113) discloses a configuration equipped with a compensation voltage generation circuit which in order to reduce an error between output voltages of an odd number of analog inversion amplifier circuits connected in series, generates a compensation voltage being the same voltage as a refresh voltage generated in the output of each analog inversion amplifier circuit upon refreshing of the inversion amplifier circuit, and a compensating means which compensates the output of the single inversion amplifier circuit as an amplifier circuit, using the compensation voltage.